The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

Feb. 13, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Hyun-Pil Noh, Gyeonggi-do, KR;

Jeong-Woon Kim, Gyeonggi-do, KR;

Seok-Ha Lee, Gyeonggi-do, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/58 (2006.01); H01L 23/528 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 23/5283 (2013.01); H01L 23/585 (2013.01); H01L 24/05 (2013.01); H01L 23/3114 (2013.01); H01L 24/02 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02235 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05553 (2013.01); H01L 2224/05601 (2013.01); H01L 2224/05623 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05638 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05669 (2013.01); H01L 2224/45424 (2013.01); H01L 2224/45444 (2013.01); H01L 2224/45447 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/85203 (2013.01); H01L 2224/85205 (2013.01);
Abstract

Provided are a semiconductor chip, a semiconductor package and a fabricating method thereof, which can reduce or prevent cracks from being generated or propagated due to an external pressure. The semiconductor chip includes a semiconductor substrate including a first region and a second region, a plurality of interlayer insulation layers formed on the semiconductor substrate, a first crack stopper formed in the plurality of interlayer insulation layers of the first region, an interconnector formed in the plurality of interlayer insulation layers of the second region, a pad wire formed on the plurality of interlayer insulation layers, electrically connected to the interconnector in the second region and extending to the first region, a bonding pad on the plurality of interlayer insulation layers of the first region, electrically connected to the pad wire, and a protection layer covering the pad wire and exposing the bonding pad. The first crack stopper is positioned at a lower level than the bonding pad and is formed to completely surround the bonding pad while not overlapping with the bonding pad and not being connected to the pad wire.


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