The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2017

Filed:

Jul. 13, 2016
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Balaji Padmanabhan, Tempe, AZ (US);

Prasad Venkatraman, Gilbert, AZ (US);

Ali Salih, Mesa, AZ (US);

Chun-Li Liu, Scottsdale, AZ (US);

Phillip Celaya, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/4825 (2013.01); H01L 21/4882 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/4951 (2013.01); H01L 23/4952 (2013.01); H01L 23/49548 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01);
Abstract

In accordance with an embodiment, a semiconductor component includes a support having a first device receiving structure, a second device receiving structure, a first lead and a second lead. A first semiconductor chip is coupled to the first device receiving structure and a second semiconductor chip is coupled to the first semiconductor chip and the second device receiving structure. The first semiconductor chip is configured from a silicon semiconductor material and has a gate bond pad, a source bond pad, and a drain bond pad, and the second semiconductor chip is configured from a gallium nitride semiconductor chip and has a gate bond pad, a source bond pad, and a drain bond pad. In accordance with another embodiment, a method for manufacturing a semiconductor component includes coupling a first semiconductor chip to a support and coupling a second semiconductor chip to the support.


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