The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Jul. 02, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Mukul R. Prasad, San Jose, CA (US);

Indradeep Ghosh, Cupertino, CA (US);

Fan Yu, San Jose, CA (US);

Paparao Palacharla, Richardson, TX (US);

Xi Wang, Murphy, TX (US);

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04Q 11/00 (2006.01); H04L 12/24 (2006.01); H04L 12/713 (2013.01);
U.S. Cl.
CPC ...
H04L 41/0893 (2013.01); H04L 45/586 (2013.01); H04Q 11/0066 (2013.01); H04Q 2011/0079 (2013.01);
Abstract

A method of mapping virtual optical networks (VONs) to a physical network that includes physical links that connect physical nodes. The method includes reading physical network information, VON demands, and technology constraints of the physical network. The method includes determining whether an iteration parameter violates an iterative condition that determines whether to continue processing the VON demands. If not, the method includes determining whether there are unprocessed subgroups of the VON demands. In response to there being unprocessed subgroups, the method includes selecting a subgroup of the VONs. The method includes computing feasible mapping patterns for the subgroup of the VONs. The method includes finding a size of a largest subset of the subgroup that has a feasible mapping and slot assignment solution. The method includes finding a mapping solution of the subset that has a feasible slot assignment and a slot assignment of the mapping solution.


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