The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Aug. 03, 2015
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventor:

Hiroshi Matsumura, Isehara, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/085 (2006.01); G01S 13/93 (2006.01); H03L 7/18 (2006.01);
U.S. Cl.
CPC ...
H03L 7/085 (2013.01); G01S 13/931 (2013.01); H03L 7/18 (2013.01);
Abstract

A PLL circuit includes a frequency divider dividing an oscillation signal to generate a divided signal having a cycle of T/M (M: an integer greater than one); a phase comparator generating M reference signals by sequentially delaying a reference signal having a cycle of T one after another by a predetermined delay time and generating an Exclusive OR calculation result of the M reference signals and the divided signal; a loop filter generating a voltage signal based on the Exclusive OR calculation result input thereto; a voltage-controlled oscillator generating the oscillation signal by oscillating at a frequency in accordance with the voltage signal; and a control circuit adjusting the predetermined delay time to be equal to T/2M based on an Exclusive OR calculation result of at least two of the M reference signals.


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