The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 07, 2015
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventor:

Nasrin Jaffari, Sunnyvale, CA (US);

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018528 (2013.01);
Abstract

A current mode logic buffer includes a differential pair of input transistors comprising a first input transistor and a second input transistor, a first output load resistor coupled in series with the first input transistor, a second output load resistor coupled in series with the second input transistor, a first output at a first node between the first output load resistor and the first input transistor, a second output at a second node between the second output load resistor and the second input transistor, a first hold capacitor configured to provide a semi-constant voltage source to the first output via a first low-resistance path, and a second hold capacitor configured to provide a semi-constant voltage source to the second output via a second low-resistance path.


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