The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9614508 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 04, 2017

Filed:

Dec. 03, 2015
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Jagdeep Bal, Saratoga, CA (US);

Louis F. Poitras, San Ramon, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03K 5/14 (2014.01); H03K 5/131 (2014.01);
U.S. Cl.
CPC ...
H03K 5/14 (2013.01); H03K 5/131 (2013.01);
Abstract

A clock generator having deskewed outputs signals wherein a transit time of each of a plurality of traces coupled to the clock generator outputs are determined and the longest trace is identified as the trace having the longest transit time. A time delay is then added to an output clock signal at each of the clock generator outputs that are not coupled to the longest trace. The addition of the time delay for each of the clock generator outputs is effective in automatically deskewing the clock generator outputs.


Find Patent Forward Citations

Bal, Jagdeep. (2017). System and method for deskewing output clock signals (U.S. Patent No. 9614508). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9614508

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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