The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

May. 07, 2013
Applicant:

Koninklijke Philips N.v., Eindhoven, NL;

Inventor:

Josef Andreas Schug, Wuerselen, DE;

Assignee:

Koninklijke Philips N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/48 (2010.01); H01L 23/367 (2006.01); H01L 33/62 (2010.01); H01L 33/64 (2010.01); H01L 25/075 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 33/486 (2013.01); H01L 23/3677 (2013.01); H01L 25/0753 (2013.01); H01L 33/62 (2013.01); H01L 33/642 (2013.01); H05K 1/181 (2013.01); H01L 2924/0002 (2013.01); H05K 2201/10106 (2013.01);
Abstract

The present invention relates to a surface mountable semiconductor device comprising at least one semiconductor element mounted on or integrated in a device substrate () having a top surface and a bottom surface. One or several electrical pads () of a first height and at least one thermal pad () of a second height are arranged at the bottom surface of the device substrate (). In the proposed surface mountable semiconductor device the height of the thermal pad () is larger than the height of the electrical pads (). This allows the mounting of such a device to an IMS with a locally removed dielectric layer in an easy and reliable manner in order to directly connect the thermal pad with the metallic substrate of the IMS.


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