The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Dec. 13, 2016
Applicant:

Cambridge Electronics, Inc., Cambridge, MA (US);

Inventors:

Bin Lu, Watertown, MA (US);

Ling Xia, Belmont, MA (US);

Assignee:

Cambridge Electronics, Inc., Cambridge, MA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/088 (2006.01); H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7784 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/66462 (2013.01);
Abstract

A multi-layer semiconductor structure is disclosed for use in III-Nitride semiconductor devices, including a channel layer comprising a first III-Nitride material, a barrier layer comprising a second III-Nitride material, a pair of ohmic electrodes disposed in ohmic recesses etched into the barrier layer, a gate electrode disposed in a gate recess etched into the barrier layer, and a filler element. The gate electrode is stepped to form a bottom stem and at least one bottom step within the gate recess. The filler element, comprising an insulating material, is disposed at least below the bottom step of the gate electrode within the gate recess. Also described are methods for fabricating such semiconductor structures. The performance of resulting devices is improved, while providing design flexibility to reduce production cost and circuit footprint.


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