The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Jul. 30, 2014
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Jong-Heon Yang, Daejeon, KR;

Jonghyurk Park, Daejeon, KR;

Chunwon Byun, Yongin-si, KR;

Chi-Sun Hwang, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 27/14 (2006.01); H01L 27/146 (2006.01); H01L 27/32 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1225 (2013.01); H01L 27/12 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1214 (2013.01); H01L 27/1259 (2013.01); H01L 27/14 (2013.01); H01L 27/1222 (2013.01); H01L 27/14609 (2013.01); H01L 27/14689 (2013.01); H01L 27/32 (2013.01); H01L 27/3241 (2013.01); H01L 27/3244 (2013.01); H01L 29/66757 (2013.01);
Abstract

Provided are a display device, a method of fabricating the display device, and a method of fabricating an image sensor device. The method of fabricating the display device includes preparing a substrate including a cell array area and a peripheral circuit area, forming a silicon layer on the peripheral circuit area of the substrate, forming oxide layers on the cell array area and the peripheral circuit area of the substrate, forming gate dielectric layers on the silicon layer and the oxide layers, forming the gate electrodes on the gate dielectric layers, wherein the gate electrodes expose both ends of the silicon layer and both ends of the oxide layers, and injecting dopant into both ends of the silicon layer and both ends of the oxide layers at the same time.


Find Patent Forward Citations

Loading…