The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Dec. 03, 2015
Applicant:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Inventors:

Chenglong Zhang, Shanghai, CN;

Haiyang Zhang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/027 (2006.01); H01L 23/532 (2006.01); H01L 23/29 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3171 (2013.01); H01L 21/0276 (2013.01); H01L 21/31144 (2013.01); H01L 21/76808 (2013.01); H01L 21/76877 (2013.01); H01L 23/291 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 23/53238 (2013.01); H01L 23/53276 (2013.01); H01L 23/53295 (2013.01); H01L 2221/1094 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method for fabricating a semiconductor structure includes: providing a substrate with a dielectric layer and a passivation layer formed on the substrate; forming a via through the dielectric layer and exposing the substrate; forming a first conductive layer to fill the via with a top surface of the first conductive layer leveled with a top surface of the passivation layer; forming a patterned layer with an opening on the passivation layer. The opening is located above the first conductive layer with a dimension larger than the dimension of the via. The method also includes forming a trench in the dielectric layer; forming a second conductive layer to fill the trench and to electrically connect to the first conductive layer; then removing a portion of the second conductive layer, the patterned layer, and the passivation layer to make a top surface of the second conductive layer level with a top surface of the dielectric layer.


Find Patent Forward Citations

Loading…