The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Jun. 15, 2016
Applicant:

Invecas, Inc., Santa Clara, CA (US);

Inventors:

Harold Pilo, Underhill, VT (US);

Gerald P. Pomichter, Fairfax, VT (US);

Michael Lee, Bronxville, NY (US);

John Edward Barth, Jr., Williston, VT (US);

Assignee:

Invecas, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/00 (2006.01); G11C 15/04 (2006.01); H03K 19/177 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
G11C 15/04 (2013.01); H03K 19/0013 (2013.01); H03K 19/1776 (2013.01);
Abstract

A content addressable memory ('CAM') field enabling logic comprises fields and field enable logics. The fields each have local match lines and a corresponding field enable control for enabling the respective field. The field enable logics are serially connected. Each of the fields is coupled to a corresponding one of the field enable logics via the respective local match lines. The corresponding field enable control for each of the fields is coupled to the corresponding one of the field enable logic and to any ones of the field enable logics that come after the corresponding one of the field enable logic along the serially-connected field enable logics.


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