The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 29, 2015
Applicant:

Adesto Technologies Corporation, Sunnyvale, CA (US);

Inventor:

Deepak Kamalanathan, Santa Clara, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0064 (2013.01); G11C 13/004 (2013.01); G11C 13/0011 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01);
Abstract

A method can include applying a first electric field to a plurality of memory elements that are programmable between at least two different resistance states; verifying whether the memory elements have a resistance outside of a first limit; for memory elements that are not outside of the first limit, applying a second electric field of a same direction as the first electric field, and not applying the second electric field to those memory elements that are outside the first limit; and verifying whether the memory elements receiving the second electric field have a resistance outside of a second limit; wherein the second limit is between the first limit and a read limit, where a memory element having a resistance below the read limit is determined to store one data value, and a memory element having a resistance above the read limit is determined to store another data value.


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