The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Oct. 20, 2015
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Hirotaka Motai, Tokyo, JP;

Yasuhiro Tawara, Tokyo, JP;

Koji Adachi, Tokyo, JP;

Hitoshi Suzuki, Tokyo, JP;

Assignee:

RENESAS ELECTRONICS CORPORATION, Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 11/14 (2006.01); G06F 11/07 (2006.01); G06F 9/44 (2006.01); G06F 11/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1438 (2013.01); G06F 9/4405 (2013.01); G06F 9/455 (2013.01); G06F 9/45533 (2013.01); G06F 11/0712 (2013.01); G06F 11/0793 (2013.01); G06F 11/3027 (2013.01); G06F 11/1484 (2013.01); G06F 2201/84 (2013.01);
Abstract

A computer system includes an interrupt controller to notify a bus error occurrence, and a multithreaded processor. The multithreaded processor includes a schedule register that settles a sequence of performing a plurality of virtual CPUs and stores data for virtual CPUs to be performed, and a virtual CPU execution portion that performs virtual CPUs according to a sequence settled by the schedule register. Virtual CPUs operate different operating systems (OS's) and include a first virtual CPU that operates a management OS to manage other OS's. When notified of bus error occurrence, the virtual CPU execution portion operates only the first virtual CPU regardless of an execution sequence settled in the schedule register. The first virtual CPU reinitializes a bus where an error occurred.


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