The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2017

Filed:

Dec. 20, 2013
Applicant:

Sharp Kabushiki Kaisha, Osaka, JP;

Inventors:

Hiroyuki Moriwaki, Osaka, JP;

Toshio Ninomiya, Osaka, JP;

Kazutaka Hanaoka, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01);
U.S. Cl.
CPC ...
G02F 1/134363 (2013.01); G02F 1/13439 (2013.01); G02F 1/133345 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 2001/134381 (2013.01);
Abstract

The present invention provides a liquid crystal display having the advantage of higher resolution and lower power consumption while having high transmittance. The present invention is a liquid crystal display provided with a first substrate, a second substrate and a horizontal orientation-type liquid crystal layer. The first substrate includes a plurality of source bus lines, a plurality of gate bus lines, a pixel electrode, a first common electrode, a first interlayer insulation film on the plurality of source bus lines, a first conductive layer on the first interlayer insulation film, a second interlayer insulation film on the first conductive layer and a second conductive layer on the second interlayer insulation film. The first common electrode includes a plurality of first linear portions having a linear shape. The pixel electrode includes one or more second linear portions. The plurality of first linear portions and one or more second linear portions are alternately disposed. All or every other two or more of the first linear portions are disposed on the source bus lines or the gate bus lines in parallel therewith, and are provided in one of the first and second conductive layers. The second linear portions are transparent, and are provided in the other of the first and second conductive layers.


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