The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2017
Filed:
Nov. 08, 2011
Methods and apparatus for determining power distribution system topology using disturbance detection
Yakov Lvovich Familiant, Brown Deer, NC (US);
Luis Rafael Pereira, Menomonee Falls, WI (US);
Huaqiang LI, Monomonee Falls, WI (US);
Michael John Harrison, Petaluma, CA (US);
Yakov Lvovich Familiant, Brown Deer, NC (US);
Luis Rafael Pereira, Menomonee Falls, WI (US);
Huaqiang Li, Monomonee Falls, WI (US);
Michael John Harrison, Petaluma, CA (US);
Eaton Corporation, Cleveland, OH (US);
Abstract
A disturbance, for example, a frequency variation, is generated in at least a portion of the power distribution network. The disturbance may be generated, for example, by an uninterruptible power supply (UPS) or some other component of the power distribution network, such as a switch. At least one node of the network experiencing the disturbance is identified and a topology of the power distribution network is determined responsive to identifying the at least one node. The at least one node may be identified by detecting a voltage-related artifact corresponding to the disturbance. A phase-locked loop (PLL)—based circuit may be used for fast artifact detection. Groups of devices in the network may be identified from the artifacts, and combinatorial optimization techniques may be used to determine connectivity within such groups.