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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9607852 B1

PDFFull Text
Date of Patent:
Mar. 28, 2017

Filed:

Apr. 24, 2014

Methods of dividing layouts and methods of manufacturing semiconductor devices using the same

Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Jeong-Hoon Lee, Yongin-Si, KR;

Sang-Wook Seo, Seoul, KR;

Hye-Soo Shin, Seoul, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:

F. Chau & Associates, LLC

Primary Examiner:

Kyoung Lee

Assistant Examiner:

Joannie A Garcia

Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/469 (2006.01); H01L 21/311 (2006.01); G03F 7/20 (2006.01); H01L 21/027 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/31144 (2013.01); G03F 7/70283 (2013.01); G03F 7/70466 (2013.01); G03F 7/70633 (2013.01); H01L 21/0274 (2013.01); H01L 21/32139 (2013.01); H01L 21/76816 (2013.01); H01L 21/76838 (2013.01);
Abstract

Target pattern layouts that include lower and upper target patterns are designed. Each lower target pattern is combined with a upper target pattern that at least partially overlaps a top surface thereof to form combination structures. The combination structures are divided into first and second combination structures. A first target pattern is formed from the lower target pattern in the first combination structure and a third target pattern is formed from the upper target pattern in the first combination structure. The first and third target patterns are formed in first and third lithography processes, respectively. A second target pattern is formed from the lower target pattern in the second combination structure and a fourth target pattern is formed from the upper target pattern in the second combination structure. The second and fourth target patterns are formed in second and fourth lithography processes, respectively.

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