The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2017

Filed:

Mar. 14, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Erich James Plondke, Austin, TX (US);

Lucian Codrescu, Austin, TX (US);

Christopher Edward Koob, Round Rock, TX (US);

Piyush Patel, Cary, NC (US);

Thomas Andrew Sartorius, Raleigh, NC (US);

Assignee:

Qualcomm Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 9/46 (2006.01); G06F 7/04 (2006.01); G06F 21/00 (2013.01); G06F 9/50 (2006.01); G06F 12/10 (2016.01);
U.S. Cl.
CPC ...
G06F 9/45533 (2013.01); G06F 9/5016 (2013.01); G06F 12/109 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/151 (2013.01); G06F 2212/656 (2013.01);
Abstract

An apparatus includes a primary hypervisor that is executable on a first set of processors and a secondary hypervisor that is executable on a second set of processors. The primary hypervisor may define settings of a resource and the secondary hypervisor may use the resource based on the settings defined by the primary hypervisor. For example, the primary hypervisor may program memory address translation mappings for the secondary hypervisor. The primary hypervisor and the secondary hypervisor may include their own schedulers.


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