The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2017
Filed:
May. 02, 2016
Applicant:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Inventor:
Ryousuke Takizawa, Kanagawa, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01); G11C 5/14 (2006.01); G11C 11/15 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0625 (2013.01); G06F 3/0634 (2013.01); G06F 3/0658 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 5/148 (2013.01); G11C 11/15 (2013.01); G11C 11/16 (2013.01); G11C 11/1697 (2013.01); G11C 5/14 (2013.01); G11C 5/143 (2013.01); G11C 5/144 (2013.01);
Abstract
A non-volatile semiconductor memory device that can reduce power consumption includes plural memory banks containing nonvolatile plural memory cells. A common data bus is shared by plural memory banks and transmits the data of the memory cells. The plural switches are provided respectively between the electric source and plural memory banks. A controller controls the plural switches. The controller, in the data reading-out action or the data writing-in action, makes at least one of the switches corresponding to at least one of the memory banks accessible in a conduction state, and other switches in a non-conduction state.