The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

May. 29, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jeongwon Yoon, Suwon-si, KR;

Boin Noh, Suwon-si, KR;

Baikwoo Lee, Gwangmyeong-si, KR;

Hyunsuk Chun, Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/49827 (2013.01); H01L 24/06 (2013.01); H01L 24/17 (2013.01); H01L 25/50 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/1316 (2013.01); H01L 2224/1317 (2013.01); H01L 2224/1318 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13123 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/13163 (2013.01); H01L 2224/13164 (2013.01); H01L 2224/13166 (2013.01); H01L 2224/13169 (2013.01); H01L 2224/13181 (2013.01); H01L 2224/13184 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/818 (2013.01); H01L 2224/81205 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06572 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/01014 (2013.01); H01L 2924/01032 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Provided is a semiconductor package and a method of making same, including a first package substrate; a first semiconductor chip mounted on the first package substrate and having a first pad and a second pad, wherein the first pad is provided on a top of the first semiconductor chip and the second pad is provided on a bottom of the first semiconductor chip, the bottom being an opposite surface of the top; and a clad metal provided on the first pad and electrically connecting the first semiconductor chip to one of a second semiconductor chip and second package substrate provided on the top of the first semiconductor chip.


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