The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

Jun. 16, 2016
Applicant:

Diftek Lasers, Inc., Waterloo, CA;

Inventor:

Douglas R. Dykaar, Waterloo, CA;

Assignee:

DIFTEK LASERS, INC., Waterloo, Ontario, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 27/32 (2006.01); H01L 21/324 (2006.01); C30B 11/00 (2006.01); C30B 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02667 (2013.01); C30B 11/002 (2013.01); C30B 11/003 (2013.01); C30B 29/06 (2013.01); H01L 21/0243 (2013.01); H01L 21/02236 (2013.01); H01L 21/02532 (2013.01); H01L 21/324 (2013.01); H01L 27/32 (2013.01);
Abstract

Certain electronic applications, such as OLED display back panels, require small islands of high-quality semiconductor material distributed over a large area. This area can exceed the areas of crystalline semiconductor wafers that can be fabricated using the traditional boule-based techniques. This specification provides a method of fabricating a crystalline island of an island material, the method comprising depositing particles of the island material abutting a substrate, heating the substrate and the particles of the island material to melt and fuse the particles to form a molten globule, and cooling the substrate and the molten globule to crystallize the molten globule, thereby securing the crystalline island of the island material to the substrate. The method can also be used to fabricate arrays of crystalline islands, distributed over a large area, potentially exceeding the areas of crystalline semiconductor wafers that can be fabricated using boule-based techniques.


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