The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

Jul. 20, 2015
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

James Wang, Vista, CA (US);

Abdulkadir U. Diril, Mountian View, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/02 (2006.01); G09G 5/06 (2006.01); G09G 5/39 (2006.01); G06T 11/00 (2006.01); G06T 1/20 (2006.01); G06T 15/04 (2011.01); G06T 19/00 (2011.01); G06T 11/40 (2006.01); G06F 15/76 (2006.01); G06F 17/30 (2006.01); H04N 1/60 (2006.01); H04N 5/357 (2011.01); H04N 19/40 (2014.01); G09G 5/37 (2006.01);
U.S. Cl.
CPC ...
G06T 11/001 (2013.01); G09G 5/37 (2013.01);
Abstract

Techniques are disclosed relating to storing processed texture information. In some embodiments, a graphics unit is configured to store graphics textures in multiple different formats. In some embodiments, texture filtering circuitry in the graphics unit is configured to operate on texture information in a particular format, but not configured to operate on texture information in one or more of the plurality of different formats. In some embodiments, graphics circuitry is configured to receive texture information in the multiple different formats and process the information to generate processed texture information in the particular format that the texture filtering circuitry is configured to operate on. In some embodiments, the graphics unit includes a storage element with entries configured to store the processed texture information, and the texture filtering circuitry is configured to access processed texture information in an entry of the storage element as input for multiple different sampling operations.


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