The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2017

Filed:

Dec. 08, 2013
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Joonyong Park, Gunpo-si, KR;

Sanggab Kim, Seoul, KR;

Changoh Jeong, Suwon-si, KR;

Taeho Kang, Incheon, KR;

Kyungseop Kim, Hwaseong-si, KR;

Gwan Ha Kim, Hwaseong-si, KR;

Byeong-Beom Kim, Asan-si, KR;

Honglong Ning, Suwon-si, KR;

Sangwon Shin, Yongin-si, KR;

Sukyoung Yang, Yongin-si, KR;

Yunjong Yeo, Seoul, KR;

Dongmin Lee, Anyang-si, KR;

Shin Il Choi, Hwaseong-si, KR;

Hyunju Kang, Pocheon-si, KR;

Sangwoo Sohn, Yongin-si, KR;

Jungha Son, Seoul, KR;

Yu-Gwang Jeong, Anyang-si, KR;

Gugrae Jo, Asan-si, KR;

Jinho Hwang, Osan-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1335 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 2001/13629 (2013.01); G02F 2001/133548 (2013.01); G02F 2201/38 (2013.01);
Abstract

A display apparatus includes a backlight assembly which generates a light and a display panel which receives the light to display an image, the display panel including a first substrate, a second substrate which faces the first substrate and is disposed closer to the backlight assembly than the first substrate, a gate line disposed on the first substrate, a data line disposed on the gate line and insulated from the gate line, a thin film transistor disposed on the first substrate and electrically connected to the gate line and the data line, and a reflection preventing layer disposed between the first substrate and the gate line to reduce an amount of a reflected light reflected by the gate line.


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