The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2017

Filed:

May. 19, 2016
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Yousof Mortazavi, Austin, TX (US);

John L. Melanson, Austin, TX (US);

Aaron Brennan, Austin, TX (US);

Assignee:

CIRRUS LOGIC, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 23/54 (2006.01); G04F 10/02 (2006.01); H03M 1/50 (2006.01); H03K 3/03 (2006.01); H03L 7/089 (2006.01); H03L 7/099 (2006.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
H03K 23/54 (2013.01); G04F 10/02 (2013.01); H03K 3/0315 (2013.01); H03K 3/0372 (2013.01); H03L 7/0891 (2013.01); H03L 7/0995 (2013.01); H03M 1/50 (2013.01);
Abstract

A circuit for a divider or counter may include a frequency divider having multiple rings for dividing an input frequency to obtain an output frequency. The first and second rings may include an odd-numbered plurality of elements, such as inverters, wherein each inverter of a ring is coupled to another inverter of the ring in a circular chain. An input frequency may be input to a power supply input of inverters of the first ring. The second ring inverters may be coupled at a power supply input to output nodes of the first ring inverters, which results in the second ring operating at a divisional rate of the first frequency given by (N−1), where N is the number of inverters in the ring. The circuits may be used in frequency dividers and counters, such as in phase-locked loops (PLLs) and analog-to-digital converters (ADCs).


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