The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 14, 2017
Filed:
Dec. 31, 2013
Robert J Brooks, Fort Collins, CO (US);
Robert J Brooks, Fort Collins, CO (US);
Other;
Abstract
A CPU architecture is proposed which flexibly allocates chip resources among threads. Execution units (microcores) are arranged in a ring. Instruction fetch units (front-ends) deposit instructions sequentially into storage elements within the microcores. Multiple front-ends can each feed segments of the ring; each such segment is a 'smart queue'. If, due to a sustained higher execution rate, a thread catches up to the next thread ahead of it, the slower thread steps aside and lets the faster thread play through. Other circumstances may lead to a thread consuming more than its usual share of resources, possibly even all of the microcores, for a time. The architecture has no instruction set dependencies; it is applicable to existing instruction set architectures and will speed up execution of them significantly as compared to conventional architectures.