The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2017

Filed:

Dec. 17, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Abhishek Agrawal, Corvallis, OR (US);

Yogesh Darwhekar, Bangalore, IN;

Gireesh Rajendran, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 5/00 (2006.01); H04B 17/00 (2015.01); G05F 1/613 (2006.01); H02M 7/217 (2006.01);
U.S. Cl.
CPC ...
G05F 1/613 (2013.01); H02M 7/217 (2013.01); H04B 5/0031 (2013.01);
Abstract

A digital shunt regulator receives a radio frequency (RF) signal at an antenna which generates a differential output signal over a differential path. A peak detector is coupled to the antenna and receives the differential output signal over the differential path. A first comparator receives a voltage output of the peak detector and a first voltage. A second comparator receives the voltage output of the peak detector and a second voltage. A digital state machine receives an output of the first comparator and an output of the second comparator. A plurality of shunt NMOS transistors receives an output of the digital state machine. The digital state machine is configured to control the number of shunt NMOS transistors that are activated to maintain the voltage output of the peak detector between the first voltage and the second voltage.


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