The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Dec. 03, 2014
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Patrick A. McKinley, Corvallis, OR (US);

Walter Lee McNall, Meridian, ID (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); H03K 19/177 (2006.01); G06F 21/88 (2013.01); H01L 21/268 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17768 (2013.01); G06F 21/88 (2013.01); H01L 21/268 (2013.01); H01L 21/76892 (2013.01);
Abstract

A system-on-chip including circuit instances, a selector module, a circuit instance module, and a comparing module. The circuit instances have respectively nodes. The circuit instances are designed to provide nominally a same value at each of the nodes. The selector module is configured to generate a selection signal. The circuit instance module is configured to (i) monitor states of the nodes, and (ii) based on the selection signal, select (a) two or more of the states of the nodes, or (b) two or more parameter values generated based on the two or more of the states of the nodes. The comparing module is configured to: compare (i) the two or more of the states of the nodes, or (ii) the two or more parameter values; and based on the comparison, output a bit of (i) a silicon fingerprint of the system-on-chip, or (ii) a unique response code of the system-on-chip.


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