The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Jan. 08, 2016
Applicants:

Yoon Hae Kim, Suwon-si, KR;

Jin Wook Lee, Seoul, KR;

Jong Ki Jung, Hwaseong-si, KR;

Myung Ii Kang, Yongin-si, KR;

Kwang Yong Yang, Seoul, KR;

Kwan Heum Lee, Suwon-si, KR;

Byeong Chan Lee, Yongin-si, KR;

Inventors:

Yoon Hae Kim, Suwon-si, KR;

Jin Wook Lee, Seoul, KR;

Jong Ki Jung, Hwaseong-si, KR;

Myung II Kang, Yongin-si, KR;

Kwang Yong Yang, Seoul, KR;

Kwan Heum Lee, Suwon-si, KR;

Byeong Chan Lee, Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 27/088 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 27/0886 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01);
Abstract

A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.


Find Patent Forward Citations

Loading…