The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2017
Filed:
Jun. 12, 2015
Semiconductor device with power transistor cells and lateral transistors and method of manufacturing
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 21/02 (2006.01); H01L 29/40 (2006.01); H01L 21/265 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7811 (2013.01); H01L 21/0217 (2013.01); H01L 21/0223 (2013.01); H01L 21/02255 (2013.01); H01L 21/26513 (2013.01); H01L 21/76202 (2013.01); H01L 27/0922 (2013.01); H01L 29/0653 (2013.01); H01L 29/0696 (2013.01); H01L 29/404 (2013.01); H01L 29/407 (2013.01); H01L 29/4236 (2013.01); H01L 29/66568 (2013.01); H01L 29/66734 (2013.01); H01L 29/78 (2013.01); H01L 29/7813 (2013.01);
Abstract
By thermal oxidation a field oxide layer is formed that lines first and second trenches that extend from a main surface into a semiconductor layer. After the thermal oxidation, field electrodes and trench gate electrodes of power transistor cells are formed in the first and second trenches. A protection cover including a silicon nitride layer is formed that covers a cell area with the first and second trenches. With the protection cover covering the cell area, planar gate electrodes of lateral transistors are formed in a support area of the semiconductor layer.