The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2017
Filed:
Mar. 03, 2014
Applicant:
Solexel, Inc., Milpitas, CA (US);
Inventors:
David Xuan-Qi Wang, Fremont, CA (US);
Mehrdad M. Moslehi, Los Altos, CA (US);
Assignee:
Solexel, Inc., Milpitas, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/18 (2006.01); H01L 29/06 (2006.01); H01L 31/0236 (2006.01); H01L 31/0352 (2006.01); H01L 31/068 (2012.01); H01L 21/3065 (2006.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0657 (2013.01); H01L 21/3065 (2013.01); H01L 29/045 (2013.01); H01L 31/0236 (2013.01); H01L 31/02363 (2013.01); H01L 31/035281 (2013.01); H01L 31/068 (2013.01); H01L 31/18 (2013.01); H01L 31/1804 (2013.01); H01L 31/1892 (2013.01); Y02E 10/547 (2013.01); Y02P 70/521 (2015.11); Y10T 117/1092 (2015.01);
Abstract
A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.