The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Mar. 29, 2013
Applicant:

Rockwell Collins, Inc., Cedar Rapids, IA (US);

Inventors:

Sarah M. Shepard, Atkins, IA (US);

Bret W. Simon, Cedar Rapids, IA (US);

Alan P. Boone, Swisher, IA (US);

Assignee:

Rockwell Collins, Inc., Cedar Rapids, IA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 21/82 (2006.01); H05K 1/18 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/57 (2013.01); H01L 21/82 (2013.01); H05K 1/181 (2013.01); H01L 25/0657 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2924/15311 (2013.01);
Abstract

An interposer and a method for stacking dies utilizing such an interposer in an integrated circuit are disclosed. The interposer includes a substrate and a plurality of vias defined in the substrate. At least one of the plurality of vias of the interposer is positioned to establish a connection with at least one of the plurality of vias of a first die. At least one additional die is positioned to establish a connection with the first die utilizing the connection established between the interposer and the first die through at least one of the vias.


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