The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Apr. 04, 2014
Applicant:

SK Hynix Inc., Icheon, KR;

Inventors:

Hyung Ju Choi, Seoul, KR;

Jong Hyun Kim, Seoul, KR;

Assignee:

SK HYNIX INC., Icheon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 22/32 (2013.01); H01L 23/3121 (2013.01); H01L 23/3135 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06537 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/1531 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19107 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor package includes a substrate, a chip disposed over a top surface of the substrate, an electromagnetic interference (EMI) shielding layer disposed over the substrate such that the EMI shielding layer surrounds the chip, a ground pad disposed in the substrate to contact a bottom surface of the substrate, and a test pad disposed in the substrate to contact the bottom surface of the substrate and spaced apart from the ground pad. A method of testing the semiconductor package is performed using a loop circuit to which a current is applied, the loop circuit being formed by electrically coupling the ground pad, the EMI shielding layer, and the test pad.


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