The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2017
Filed:
Nov. 04, 2015
International Business Machines Corporation, Armonk, NY (US);
Karl R. Erickson, Rochester, MN (US);
Robert E. Kilker, Rochester, MN (US);
Phil C. Paone, Rochester, MN (US);
David P. Paulsen, Inver Grove Heights, MN (US);
John E. Sheets, II, Zumbrota, MN (US);
Gregory J. Uhlmann, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A memory array has a NVM element with a plurality of FETs. A first set of FETs of the plurality of FETs is coupled to a bitline true of the memory array. The first set of FETs has a first channel width. A second set of FETs of the plurality of FETs is coupled to a bitline complement of the memory array. The second set of FETs has a second channel width. The first channel width is greater than the second channel width. The channel width disparity provides the NVM element of the unprogrammed memory array with a default state.