The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Jul. 09, 2014
Applicant:

Thinci, Inc., El Dorado Hills, CA (US);

Inventors:

Val G. Cook, Shingle Springs, CA (US);

Satyaki Koneru, Folsom, CA (US);

Ke Yin, El Dorado Hills, CA (US);

Dinakar C. Munagala, El Dorado Hills, CA (US);

Assignee:

ThinCI, Inc., El Dorado Hills, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 17/00 (2006.01); G06T 1/60 (2006.01); G06T 15/40 (2011.01); G06T 15/00 (2011.01); G06T 15/04 (2011.01); G06T 17/20 (2006.01); G06T 15/80 (2011.01);
U.S. Cl.
CPC ...
G06T 15/405 (2013.01); G06T 1/60 (2013.01); G06T 15/005 (2013.01); G06T 15/04 (2013.01); G06T 15/80 (2013.01); G06T 17/20 (2013.01);
Abstract

Embodiments disclosed include a mechanism in a system and method for significantly reducing power consumption by reducing computation and bandwidth. This mechanism is particularly applicable for modern 3D synthetic images which contain high pixel overdraw and dynamically generated intermediates images. Only blocks of computation which contribute to the final image are performed. This is accomplished by rendering in reverse order and by performing multiple visibility sort in a streaming fashion through the pipeline. Rendering of dynamically generated intermediate images is performed sparsely by projecting texture coordinates from a current image back into one or more dependent images in a recursive manner. The newly computed pixel values are then filtered and control is returned to the sampling shader of the current image. When only visible pixels are projected optimal computation is performed. Several implementations are presented with increasing efficiency. An acceleration structure, termed a Draw Buffer, simplifies the process of projecting backward and utilizes a hardware managed dynamic memory object. This mechanism reduces computation by 50%, with significant bandwidth and power savings.


Find Patent Forward Citations

Cook, Val. (2017). Mechanism for minimal computation and power consumption for rendering synthetic 3d images, containing pixel overdraw and dynamically generated intermediate images (U.S. Patent No. 9589388). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9589388

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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