The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2017

Filed:

Oct. 21, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ramon Bertran, Bronx, NY (US);

Pradip Bose, Yorktown Heights, NY (US);

Alper Buyuktosunoglu, White Plains, NY (US);

Timothy J. Slegel, Staatsburg, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/00 (2006.01); G06F 13/00 (2006.01); G06F 9/45 (2006.01); G01R 31/28 (2006.01); G06F 11/30 (2006.01); G06F 11/34 (2006.01); G06F 9/455 (2006.01); G06F 13/10 (2006.01); G06F 13/12 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3024 (2013.01); G06F 11/3428 (2013.01); G01R 31/28 (2013.01); G06F 9/455 (2013.01); G06F 13/10 (2013.01); G06F 13/12 (2013.01); G06F 17/5009 (2013.01); G06F 17/5022 (2013.01);
Abstract

One aspect is a method that includes analyzing, by a processor of an analysis system, an instruction set architecture of a targeted complex-instruction set computer (CISC) processor to generate an instruction set profile for each CISC architectural instruction variant of the instruction set architecture. A combination of instruction sequences for the targeted CISC processor is determined from the instruction set profile that corresponds to a desired stressmark type. The desired stressmark type defines a metric representative of functionality of interest of the targeted CISC processor. Performance of the targeted CISC processor is monitored with respect to the desired stressmark type while executing each of the instruction sequences. One of the instruction sequences is identified as most closely aligning with the desired stressmark type based on performance results of execution of the instruction sequences with respect to the desired stressmark type.


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