The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2017
Filed:
Sep. 21, 2015
Sujoy Chakravarty, Bangalore, IN;
Sujoy Chakravarty, Bangalore, IN;
SILAB TECH PVT. LTD., Bangalore, IN;
Abstract
Embodiments of the present invention disclose an apparatus for managing clock duty cycle. The apparatus comprises a Duty Cycle Control Circuit (DCCC) for receiving at least an input clock signal and generating an output clock signal with adjustable duty cycle, a first Low-Pass Filter with Pull-Up Resistor (LPFPR) for receiving the output clock signal with adjustable duty cycle and simultaneously averaging and raising the common mode of the output thereof, a frequency divider for generating a signal with a 50% duty cycle, a second LPFPR for receiving the generated signal with 50% duty cycle and simultaneously averaging and raising the common mode of the output thereof and an OPAMP for receiving the outputs of the first and second LPFPRs for generating an equivalent reference signal to be fed to the DCCC as a control input, thereby facilitating correction of the duty cycle of the input clock signal.