The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2017
Filed:
Aug. 11, 2014
Applicants:
Kyol Park, Daejeon, KR;
Jichul Kim, Yongin-si, KR;
Yunhyeok Im, Hwaseong-si, KR;
Eon Soo Jang, Suwon-si, KR;
Inventors:
Kyol Park, Daejeon, KR;
Jichul Kim, Yongin-si, KR;
Yunhyeok Im, Hwaseong-si, KR;
Eon Soo Jang, Suwon-si, KR;
Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/522 (2006.01); H01L 23/552 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/36 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01); H05K 1/14 (2006.01); H01L 25/065 (2006.01); H01L 23/42 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 23/3128 (2013.01); H01L 23/36 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 23/5385 (2013.01); H01L 23/552 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H05K 1/0207 (2013.01); H05K 1/141 (2013.01); H01L 23/42 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/92225 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1094 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H05K 2201/10378 (2013.01);
Abstract
The inventive concepts provide package-on-package (PoP) devices. In the PoP devices, an interposer substrate and a thermal boundary material layer may be disposed between a lower semiconductor package and an upper semiconductor package to rapidly exhaust heat generated from a lower semiconductor chip included in the lower semiconductor package. The interposer substrate may be formed of one or more insulating layers, conductive vias, heat dissipating members, protection layers, and various conductive patterns.