The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Mar. 17, 2015
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Andrew Christopher Graeme Wood, St.Jakob i. Rosental, AT;

Gernot Fasching, Villach, AT;

Marius Aurel Bodea, Villach, AT;

Thomas Krotscheck Ostermann, Velden am Worthersee, AT;

Erwin Bacher, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/66 (2006.01); H01L 21/78 (2006.01); G06F 17/50 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 22/34 (2013.01); G06F 17/5072 (2013.01); H01L 21/78 (2013.01); H01L 22/14 (2013.01); H01L 22/32 (2013.01); H01L 23/528 (2013.01); H01L 23/53271 (2013.01); H01L 24/05 (2013.01); H01L 2224/0518 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05157 (2013.01); H01L 2224/05164 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05169 (2013.01); H01L 2224/05172 (2013.01); H01L 2224/05184 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01); H01L 2924/146 (2013.01);
Abstract

A method for semiconductor fabrication includes forming a first array of semiconductor circuitry and a second array of semiconductor circuitry separated by a singulation region and a contact region. The method also includes forming a first array of process control monitoring structures within the singulation region of a substrate. The method also includes forming a first array of contact pads disposed in the contact region. The method also includes forming electrical connections between the first array of process control monitoring structures and the first array of contact pads, wherein all external electrical connections to the first array of process control monitoring structures are made through the first array of contact pads.


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