The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9583347 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 28, 2017

Filed:

Mar. 17, 2016
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Mikio Arakawa, Utsunomiya, JP;

Satoshi Yoshizaki, Tachikawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/266 (2006.01); H01L 27/146 (2006.01); H01L 21/027 (2006.01); H01L 21/761 (2006.01);
U.S. Cl.
CPC ...
H01L 21/266 (2013.01); H01L 21/0274 (2013.01); H01L 21/761 (2013.01); H01L 27/1463 (2013.01); H01L 27/14689 (2013.01);
Abstract

A manufacturing method for a semiconductor device, the method, comprising forming, on a substrate, a first resist pattern including a plurality of line patterns extending in a predetermined direction, injecting an impurity into the substrate by using the first resist pattern, removing the first resist pattern, forming a second resist pattern including a plurality of second line patterns extending in the predetermined direction, and injecting an impurity into the substrate by using the second resist pattern, wherein, in the forming the second resist pattern, the plurality of second line patterns are respectively formed between places where the adjacent first line patterns are formed.


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Arakawa, Mikio. (2017). Manufacturing method for semiconductor device using resist patterns and impurity injections (U.S. Patent No. 9583347). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9583347

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