The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Jun. 14, 2013
Applicant:

Broadcom Corporation, Irvine, CA (US);

Inventor:

Nilesh Gharia, Morgan Hill, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 11/161 (2013.01); H01L 27/222 (2013.01); H01L 27/228 (2013.01);
Abstract

A memory cell comprises a dual-gate fin field effect transistor (FinFET) and first and second serially connected magnetic tunnel junction (MTJ) devices for improving reliability of memory operations. The FinFET represents an access transistor and includes a first gate and a second gate. The second gate is configured to be electrically independent from the first gate and to adjust threshold voltage of the FinFET. Each of the first and second MTJ devices represent a magnetic storage element and includes at least two ferromagnetic (FM) layers separated by a thin insulating layer forming a tunneling junction. Based on the relative magnetization of the two FM layers, each MTJ device has high and low resistance states. Higher reliability of memory write operation is primarily achieved with the help of FinFET and higher reliability of memory read operation is primarily achieved with increased read margin.


Find Patent Forward Citations

Loading…