The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Aug. 25, 2016
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Yong Seop Kim, Icheon-si, KR;

Ji Hyae Bae, Icheon-si, KR;

Min Chul Shin, Icheon-si, KR;

Jun Gi Choi, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01); G11C 7/22 (2006.01); G11C 8/08 (2006.01); G11C 8/10 (2006.01); G11C 29/00 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
G11C 7/22 (2013.01); G11C 8/08 (2013.01); G11C 8/10 (2013.01); G11C 29/781 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/785 (2013.01);
Abstract

A memory apparatus includes a first memory bank, a second memory bank, a row decoder and repair circuit, and an input/output driver controller. The row decoder and repair circuit is coupled to the first and second memory banks in common. The row decoder and repair circuit generates a shared repair signal according to whether a word line disposed in a first memory bank is replaced with a word line disposed in a second memory bank. The input/output driver controller allows read or write operations for one of the first and second memory banks to be performed based on the shared repair signal and an operation signal.


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