The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2017

Filed:

May. 14, 2015
Applicant:

Broadcom Corporation, Irvine, CA (US);

Inventors:

Tirdad Sowlati, Irvine, CA (US);

Ehsan Adabi, San Jose, CA (US);

Sayedfarid Shirinfar, Granada Hills, CA (US);

Ahmadreza Rofougaran, Newport Coast, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01); H03F 1/02 (2006.01); H03F 3/195 (2006.01); H03F 3/21 (2006.01); H03F 3/24 (2006.01); H03F 3/193 (2006.01); H03G 3/20 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0205 (2013.01); H03F 1/0272 (2013.01); H03F 3/193 (2013.01); H03F 3/195 (2013.01); H03F 3/211 (2013.01); H03F 3/24 (2013.01); H03F 2200/105 (2013.01); H03F 2200/405 (2013.01); H03F 2200/451 (2013.01); H03F 2200/78 (2013.01); H03F 2203/21142 (2013.01); H03G 3/20 (2013.01);
Abstract

An apparatus includes a cascode amplifier. The cascode amplifier includes a first transistor and a second transistor. The cascode amplifier is configured to receive a first bias voltage, a second bias voltage, and a signal. The cascode amplifier is also configured to amplify the signal based at least on the first bias voltage and the second bias voltage. The apparatus also includes a first feedback module and a second feedback module. The first feedback module is configured to adjust the first bias voltage based at least on the amplified signal. The second feedback module is configured to adjust the second bias voltage based at least on a voltage distribution across the first transistor and the second transistor. A system and method for maintaining cascode amplifier performance are also provided.


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