The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2017

Filed:

Dec. 27, 2014
Applicant:

AU Optronics Corp., Hsin-Chu, TW;

Inventors:

Wei-Chu Hsu, Hsin-Chu, TW;

Man-Wen Shih, Hsin-Chu, TW;

Ya-Ling Chen, Hsin-Chu, TW;

Chien-Ya Lee, Hsin-Chu, TW;

Assignee:

AU OPTRONICS CORP., Hsin-chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/00 (2006.01); G09G 3/20 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/20 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01); G11C 19/28 (2013.01);
Abstract

A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.


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