The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2017

Filed:

Apr. 29, 2010
Applicants:

James Lupton Hedrick, Pleasanton, CA (US);

Victor Yee-way Lee, San Jose, CA (US);

Teddie Peregrino Magbitang, San Jose, CA (US);

Robert Dennis Miller, San Jose, CA (US);

Inventors:

James Lupton Hedrick, Pleasanton, CA (US);

Victor Yee-Way Lee, San Jose, CA (US);

Teddie Peregrino Magbitang, San Jose, CA (US);

Robert Dennis Miller, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C04B 38/00 (2006.01); C08F 12/08 (2006.01); C08F 265/04 (2006.01); H01L 21/50 (2006.01); C08G 83/00 (2006.01);
U.S. Cl.
CPC ...
C08G 83/003 (2013.01);
Abstract

A nanoparticle which includes a multi-armed core and surface decoration which is attached to the core is prepared. A multi-armed core is provided by any of a number of possible routes, exemplary preferred routes being living anionic polymerization that is initiated by a reactive, functionalized anionic initiator and ∈-caprolactone polymerization of a bis-MPA dendrimer. The multi-armed core is preferably functionalized on some or all arms. A coupling reaction is then employed to bond surface decoration to one or more arms of the multi-armed core. The surface decoration is a small molecule or oligomer with a degree of polymerization less than 50, a preferred decoration being a PEG oligomer with degree of polymerization between 2 and 24. The nanoparticles (particle size ≦10 nm) are employed as sacrificial templating porogens to form porous dielectrics. The porogens are mixed with matrix precursors (e.g., methyl silsesquioxane resin), the matrix vitrifies, and the porogens are removed via burnout. Greater porosity reduces the dielectric constant k of the resulting dielectrics. The porous dielectrics are incorporated into integrated circuits as lower k alternatives to silicon dioxide.


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