The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Jun. 27, 2016
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Sunny Gupta, Noida, IN;

Snehal J. Rathi, Noida, IN;

Sriram Balamurali, New Delhi, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/12 (2006.01); H03K 19/017 (2006.01); H03F 3/16 (2006.01); H04L 12/931 (2013.01);
U.S. Cl.
CPC ...
H03M 1/1245 (2013.01); H03K 19/01714 (2013.01); H03F 3/16 (2013.01); H04L 49/405 (2013.01);
Abstract

A pre-charge buffer for sampling input signals and generating a sampled output signal includes a coarse sampling circuit, a fine sampling circuit, and a sample and hold circuit. The coarse sampling circuit pre-samples the input signals during hold phases and for a first predetermined time interval during sample phases of the corresponding sample and hold cycles, and generates a first output signal. The fine sampling circuit samples the input signals during sample phases and generates a second output signal. The sample and hold circuit receives the first and second output signals, and generates a sampled output signal. The coarse sampling circuit provides the first output signal for a predefined time interval during the sample phases to reduce the effect of charge injection and charge sharing. The system uses bottom plate sampling to reduce charge injection caused by switches in the coarse sampling circuit.


Find Patent Forward Citations

Gupta, Sunny. (2017). Pre-charge buffer for analog-to-digital converter (U.S. Patent No. 9571118). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9571118

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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