The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Dec. 17, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Aditya Bansal, White Plains, NY (US);

Thomas J. Bucelot, Wappingers Falls, NY (US);

Alan J. Drake, Round Rock, TX (US);

Phillip J. Restle, Katonah, NY (US);

David W. Shan, Austin, TX (US);

Mrigank Sharad, West Lafayette, IN (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); H03K 19/00 (2006.01); H03K 3/012 (2006.01); H03K 5/05 (2006.01); H03K 5/13 (2014.01); H03K 5/06 (2006.01); H03K 5/135 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0016 (2013.01); H03K 3/012 (2013.01); H03K 5/05 (2013.01); H03K 5/06 (2013.01); H03K 5/13 (2013.01); H03K 5/135 (2013.01); H03K 2005/00013 (2013.01); H03K 2005/00234 (2013.01);
Abstract

A clock driver is provided. The clock driver includes a multi-stage delay cell having an input, a positive pulse driving branch, a negative pulse driving branch, and an output. The input is for receiving an original version of a reference clock signal input to the clock driver and used to generate a global clock signal. The output is connected to the positive pulse driving branch and the negative pulse driving branch. The clock driver further includes a pulse generator having positive and negative pulse generator portions respectively connected to outputs of the positive and negative pulse driving branches. The pulse generator generates, at any given time, one of a positive pulse and a negative pulse responsive to a positive pulse enable signal and a negative pulse enable signal, respectively, and the original version of the reference clock signal input to the clock driver without modification.


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