The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Dec. 04, 2013
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;

Inventors:

Jiaxiang Zhang, Beijing, CN;

Jian Guo, Beijing, CN;

Xiaohui Jiang, Beijing, CN;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/786 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 27/12 (2006.01); H01L 29/24 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78696 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1225 (2013.01); H01L 29/24 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 29/7869 (2013.01); H01L 29/78606 (2013.01); H01L 29/78618 (2013.01);
Abstract

The embodiments of the present invention provide a thin film transistor including a gate, an upper active layer, a lower active layer, an upper source, a lower source, an upper drain and a lower drain. The upper active layer and the lower active layer are disposed at an upper side and a lower side of the gate, respectively, the lower source and the lower drain are connected to the lower active layer, respectively, and the upper source and the upper drain are connected to the upper active layer, respectively. The embodiments of the present invention also provide an array substrate including the thin film transistor, a method of fabricating the array substrate, and a display device including the array substrate.


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