The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Apr. 30, 2016
Applicant:

SK Hynix Inc., Icheon-Si, KR;

Inventors:

Seok-Pyo Song, Icheon-Si, KR;

Sung-Woong Chung, Icheon-Si, KR;

Jong-Han Shin, Icheon-Si, KR;

Assignee:

SK hynix Inc., Icheon-Si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); H01L 27/22 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); G11C 13/00 (2006.01); G06F 3/06 (2006.01); G06F 12/08 (2016.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/228 (2013.01); G06F 3/061 (2013.01); G06F 3/0659 (2013.01); G06F 3/0685 (2013.01); G06F 12/0802 (2013.01); G06F 13/28 (2013.01); G11C 13/0002 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); G06F 2212/60 (2013.01);
Abstract

Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.


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