The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Mar. 14, 2016
Applicant:

Inotera Memories, Inc., Taoyuan, TW;

Inventors:

Shing-Yih Shih, New Taipei, TW;

Tieh-Chiang Wu, Taoyuan, TW;

Assignee:

INOTERA MEMORIES, INC., Taoyuan, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3185 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 21/78 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01);
Abstract

A semiconductor package includes a redistributed layer (RDL) interposer having a first side, a second side opposite to the first side, and a vertical sidewall extending between the first side and the second side; at least one semiconductor die mounted on the first side of the RDL interposer; a molding compound disposed on the first side and covering the at least one semiconductor die and the vertical sidewall of the RDL interposer; and a plurality of solder bumps or solder balls mounted on the second side.


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