All-digital delay-locked loop circuit based on time-to-digital converter and control method thereof

Abstract

Disclosed is an all-digital delay locked loop circuit based on a time-to-digital converter and a control method thereof. The all-digital delay locked loop circuit includes a phase inversion locking control circuit for determining whether or not to use a phase inversion locking algorithm by detecting a phase difference between an input clock and an output clock and outputting the input clock or an inverted input clock; and a phase synchronization unit connected to an output terminal of the phase inversion locking control circuit to receive an output signal of the phase inversion locking control circuit and a control signal and perform phase synchronization, in which the phase synchronization unit includes a digital control delay line for receiving the input clock or the inverted input clock output from the phase inversion locking control circuit and reducing a phase error between the input clock and the output clock.