The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2017

Filed:

May. 30, 2014
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Augustin J. Farrugia, Cupertino, CA (US);

Benoit Chevallier-Mames, Paris, FR;

Bruno Kindarji, Paris, FR;

Mathieu Ciet, Paris, FR;

Thomas Icart, Paris, FR;

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); H04L 9/06 (2006.01); G09C 1/00 (2006.01);
U.S. Cl.
CPC ...
H04L 9/0631 (2013.01); G09C 1/00 (2013.01); H04L 2209/16 (2013.01); H04L 2209/603 (2013.01); H04L 2209/76 (2013.01);
Abstract

Some embodiments provide for an improved method for performing AES cryptographic operations. The method applies a look up table operation that includes several operations embedded within look up tables. The embedded operations include a permutation operation to permute several bytes of AES state, a multiplication operation to apply a next round's protection to the AES state, an affine function and an inverse affine function to conceal the multiplication operation, and an inverse permutation operation to remove a previous round's protection. Some embodiments provide for an optimized method for efficiently performing such protected AES operations. The method alternates rounds of AES processing between software processing (e.g. processing by a CPU, performed according to software instructions) and hardware processing (e.g. processing by cryptographic ASIC).


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